FRIDAY 11 SEPTEMBER 2020 | 10:15 – 12:05
This session shows the results of a Hardware-in-the-loop demonstration of non-selective protection systems for meshed HVDC grids which was performed within PROMOTioN Project.
The objective of the WP9 of PROMOTioN project is to demonstrate operation of the DC grid protection systems developed in the project using hardware in the loop real-time methods. We integrate results from DC Circuit Breaker (DCCB) modelling and DC protection development including hardware prototype of relay and demonstration of DC Grid protection system interoperability. A plurality of protection methods (or strategies) are tested, to reflect main results of previous studies. Non-selective fault clearing strategies demonstration tests are carried out at the SuperGrid Institute (France), including Converter Breaker Strategy (CBS) and Full-Bridge MMC-based Strategy (FBS).
The specific objectives are:
- To integrate DCCB models, IEDs prototype and protection strategies in real-time simulation environments;
- To develop DC grid benchmark models and test procedures for protection system testing;
- To demonstrate protection system performance using hardware in the loop real-time testing;
- To demonstrate primary and back-up DC Grid protection and system level consequences of protection failure;
- Demonstrate equipment interoperability through the implementation of industrial communication protocol for protection relays, like IEC 61850 standard;
- To demonstrate DC grid restoration performance after protection process thanks to a DC grid control (station and central supervisors) implemented in IEDs (Hardware-In-the-Loop) or into the simulation (Software-In-the-Loop).
The presentation is split into three main parts: an introduction on non-selective fault clearing based strategies for Multi-Terminal DC (MTDC) grids; a technical description of the setup including hardware, software and methodology and finally the Hardware-In-the-Loop demonstration itself including video sequences.
The non-selective protection strategies are presented in order to understand differences with full-selective protection strategies, advantages and disadvantages, particularities, way of working during primary sequence or in case of a protection component failure, i.e. back-up sequences. After this general introduction, a focus is done on the two strategies implemented in this demonstration. The first one is the Converter Breaker Strategy, based on mechanical DC Circuit Breakers at the converter output and able to quickly open the circuit while more line mechanical DCCBs driven by an appropriate algorithm isolate the faulty line. Converter and breakers are all synchronised in order to restore DC voltage and power flow as quickly as possible. The second one is a non-selective based fault clearing strategy employing Full-Bridge MMC converters with fault current control capability. Full-bridge MMC control includes a specific protection algorithm able to rapidly reduce to zero the faulty current at the converter. Line mechanical DCCBs with reduced voltage and breaking current capabilities are opened by a faulty line identification algorithm.
The demonstration implements two test setups, one for each strategy. In addition to the protection strategy validation itself, each experiments has specific objectives. For the Converter Breaker Strategy, the goal is to implement a control and protection supervisor architecture in real controllers, communicating via the IEC 61850 standard protocol. The supervisors are able to start-up the MTDC and to manage voltage and power restoration. Standard IEC61850 is a guarantee of interoperability. For Full-Bridge MMC-based Strategy, the goal is to run in real-time a MTDC grid model, FB MMC control and a specific protection strategy designed and developed by colleagues from RWTH Aachen University. In particular, the protection relay algorithms, first implemented on the real-time simulation tool by Rapid Control Prototyping from a Matlab-Simulink model, are transcript on real IEDs. Communication between real-time simulation and IEDs is designed and added to the initial setup. The FB MMC-based strategy is then validated in this new Hardware-in-the-Loop setup.
Some parts of the setup are common to the two demonstrations and are presented in details:
- the 4-terminals MTDC network;
- relays and supervisor (CBS only) are implemented in Raspberry PI-based IED;
- Communication between real-time simulation and IEDs is based on IEC61850;
- Real-time target and tools.
The Converter Breaker Strategy setup description is focused on:
- the supervisor design and implementation;
- the controller and a communication architecture between the real-time target and 16 IEDs (relays and supervisor);
- the communication IEC61850 implementation.
The Full-Bridge MMC-based protection Strategy setup description is focused on:
- Full-Bridge MMC model;
- the porting of the protection relays algorithm from the real-time simulation to the IEDs;
- the communication IEC61850 implementation.
The last part of the presentation deals with the live demonstration. Pedagogic explanations and video sequences will try to restore the different elements of the validation: supervised start-up of the MTDC, fault-clearing strategies, and voltage and power restoration. To highlights all important parts, video sequences are showing voltages and currents inside the MTDC grid, active and reactive power exchange with the AC areas at each station, breakers and converter status, communication streaming between real-time simulation, relays, station supervisors and central supervisor. In both demonstrations, strategies are validated, showing fault clearing and restoration capabilities in a period perfectly suited to the operation of the networks. Finally, the demonstrations meet the initial objectives of the project: precise component models, realistic MTDC grid and converter controls, implementation in real IEDs, industrial communication protocol fulfilling the interoperability requirements and real-time validation of non-selective protection strategies.
Chairman: Laurent Chédot, SuperGrid Institute, France
Non-selective protection strategies
- Alberto Bertinato
- Pascal Torwelle
- Philipp Ruffing
- Generalities on protection strategies
- Converter-Breaker protection Strategy
- Full-Bridge MMC-based protection Strategy
- William Leon-Garcia / Antoine Ghyselinck
William Leon-Garcia /Antoine Ghyselinck
- Scope of the Hardware-In-the-Loop real-time demonstration
- Results of the Hardware-In-the-Loop real-time demonstration, including sequences of the live demonstration
Laurent Chédot has obtained his engineering degree in electromechanical engineering from the University of Technology of Compiègne (France) in 2000, his MSc degree in electrical engineering from the University of Paris 6 in 2001 and his PhD degree in electrical engineering from the University of Technology of Compiègne in 2004.
His employment experience includes Valeo Electrical System during 4 years working on Starter-Generator and Alstom Transport during 10 years working on train motor control. From 2014 to 2018, he works with SuperGrid Institute as power converter research engineer working on control, storage and health monitoring of power converter for MVDC and HVDC grids. Since 2019, he works with SuperGrid Institute as research group leader. He carries out research on grid modelling and simulation.
Alberto Bertinato graduated from the Faculty of Electrical Engineering at University of Padova, Italy, in 2006. From 2006 to 2008 he worked as engineer for the design of Static Var Compensator for electric arc furnace. From 2009 to 2013 he worked at a research center for development of gas-insulated high-voltage switchgear for AC system. In January 2013 he joined SuperGrid Institute where he is currently leading the HVDC grid protection research group. He contributed to PROMOTioN Project Work Package 4, DC Grid protection system development.
Pascal Torwelle received his M.Sc. degree in electrical energy engineering from the University of Hanover, Germany, in 2017. He is currently a PhD Research engineer at SuperGrid Institute and G2Elab, France. His research interests include power system protection with focus on the protection of meshed VSC HVDC systems.
Philipp Ruffing was born in Saarbrücken, Germany, in 1990. He received his B.Sc. and M.Sc. degree in electrical engineering from RWTH Aachen University, in 2013 and 2015, respectively. He is currently working as research associate at the Institute for High Voltage Equipment and Grids, Digitalization and Energy Economics of the RWTH Aachen University pursuing the doctoral degree. Since June 2019 he is leading the team “DC Systems”. His research interests include control and protection of VSC HVDC systems as well as their investigation using hardware-in-the-loop systems. Since 2016 he is leading the work package “MMC Test Bench Demonstrator” in the EU Horizon 2020 project PROMOTioN. He is a member of CIGRÉ.
William R. Leon Garcia obtained a double degree in electrical and electronics engineering from University of Los Andes, Bogota, Colombia. He arrived in France in 2012, were he followed a Master’s degree in electrical engineering for smart grids and buildings at the Grenoble Institute of Technology. He then joined the SuperGrid Institute in 2014, where he focused his research on the protection of meshed HVDC networks using superconducting devices. He was granted a PhD degree by the Grenoble Alpes University, France, in 2017. Since then he joined the HVDC architecture and systems team at the SuperGrid Institute and works at the real-time simulation platform for the development and prototyping of substation automation systems for future transmission networks.
Antoine Ghyselinck graduated from the French Engineering School CentraleSupélec with an energy specialty in 2019. He started an internship at the Supergrid Institute’s program « Architecture and systems » to study the impact of reactive power on rotor angle stability. He then joined the company to work on real-time simulation. He currently works on the PROMOTioN’s Work Package 9, implementing protection strategies for MTDC in Hardware In the Loop.